Integrated circuits may include multiple cores that are independently controlled. Non-limiting examples of cores include digital processors, general purpose processors, communication fabrics and the like.
In order to save power, cores can be shut down when they are not required, and be powered up (active) when they are required. Accordingly, one core can be shut down while another core is active, or one core can be powered up while another core is active.
Activating or shutting down a core while another core is active may affect the voltage and/or current supplied to the already active core and thus may dramatically affect the performance of the already active core. Generally, an activation of a previously inactive core starts with a dramatic increment of the current consumption of that core. A main power source usually cannot instantaneously supply all the desired current consumption of the core being activated, at least partly due to the inductance of the power distribution network that connects the main power source to the core. Thus, the core being activated may consume power from the already active core. This consumption may dramatically interfere with the operation of the already active core.
There is a growing need to provide a power management scheme that will allow activating a core without dramatically interfering with the operation of another core.